We're looking for your comments on how to best organize the wiki's content.
SHR arg1, arg2
arg2 bits to the right. The bits that were shifted out are stored in the
 Signing awareness
EX register usage
The bits shifted out are stored in the
In binary machine code, this Basic opcode's five-bit representation is:
0b0 1101 (
The instruction has a takes one cycle to execute, plus any additional cycles necessary to evaluate the arguments.
- DCPU-16 specification v1.1 (Copyright 2012 Mojang)
- DCPU-16 specification v1.7 (Copyright 2012 Mojang)