History of the DCPU-16

This article is about previous versions of the DCPU-16.

However, other articles linked herein document the behavior of the latest version, unless explicitly specified.

Notch released several early versions of the DCPU-16 for public review prior to the current version. For the current version, see Instruction set.

Version 1.1

Version 1.1 of the DCPU-16 specification can be found here.

Differences from latest version

This comparison is current as of version 1.7. Version 1.1 has:

• a single overflow status bit (labeled "O"), in contrast to a full, 16-bit excess register (EX).
• no sign-aware operations
• fewer conditional instructions
• no STI, STD, ADX, or SBX instructions
• no interrupt system
• no hardware support (aside from the keyboard and monitor, supported via static memory mapping).
• no support for the PICK addressing mode
• support for POP and PUSH addressing modes in either the first or the second argument to an instructions (in the latest version, POP is only allowed as a second argument, and PUSH is only allowed as a first argument).

Compatibility with latest version

After replacing mentions of the O status bit with EX, assembly source code can be reassembled for version 1.7. Note, however, that the cycle costs of certain operations have been changed.

While similar in structure, the machine code for version 1.1 is incompatible with version 1.7. PUSH and POP stack addressing modes are encoded differently, and many of the core opcodes have been reorganized.

Basic Instructions

Instruction	Behavior	Overflow	See Also
SET A, B	Stores the value of B in A.	None
ADD A, B	Stores the value of A+B in A.	O = 1 if A+B > 0xffff, 0 otherwise
SUB A, B	Stores the value of A-B in A.	O = 0xffff is B > A, 0 otherwise
MUL A, B	Stores the value of A*B in A.	O = the upper 16 bits of A*B
DIV A, B	Stores the value of A/B in A. Sets A to 0 on divide-by-zero error.	O = 0 on divide-by-zero, or the lower 16 bits of A/B.
MOD A, B	Stores the remainder of A/B in A. Sets A to 0 on divide-by-zero error.	None
SHL A, B	Shifts A to the left by B bits.	O = the upper B bits of A that were shifted out	boolean algebra
SHR A, B	Shifts A to the right by B bits.	O = the lower B bits of A that were shifted out	boolean algebra
AND A, B	Stores bitwise AND of A and B in A.	None	boolean algebra
BOR A, B	Stores bitwise OR of A and B in A.	None	boolean algebra
XOR A, B	Stores bitwise EXCLUSIVE OR of A and B in A.	None	boolean algebra
IFE A, B	Perform the next instruction if A is equal to B.	None	control flow
IFN A, B	Perform the next instruction if A is not equal to B.	None	control flow
IFG A, B	Perform the next instruction if A is strictly greater than B.	None	control flow
IFB A, B	Perform the next instruction if A&B is not zero. In other words, if A and B have any of the same bits set, perform the next instruction.	None	control flow

Special Instructions

Instruction	Behavior	Overflow	See Also
JSR A	Stores the PC on the stack and begins the subroutine located at A.	None	control flow

Addressing Modes

Name	Example	Description	See Also
Immediate	SET A, 42	Uses a literal number as the source of an operation. Using it as the destination fails silently.
Register	SET A, B	Uses a register as the source or destination.	registers
Memory	SET [0x100], [0x100+I]	Uses a memory location as the source or destination. The location can be either a literal number, a general purpose register, or the sum of the two.
PEEK	SET A, PEEK	Uses the location in memory pointed to by the stack pointer as the source or destination. The stack pointer itself is left unmodified.	stack
PUSH	SET PUSH, 10	First, decrements the stack pointer by 1. Then, uses the new memory location pointed to by SP. ("Pushing" a new value onto the stack.)	stack
POP	SET A, POP	First, uses the location pointed to by SP. Then, increments the stack pointer by 1. ("Popping" a value off the stack.)	stack

Version 1.4

Version 1.4 of the DCPU specification can be found here.

Additions

Some features not present in version 1.1 were added in version 1.4. Version 1.4 added:

• some sign-aware operations.
• a full, 16-bit EX register.
• support for the PICK addressing mode (at the expense of only allowing PUSH for the first argument and POP for the second argument).
• more conditional instructions.
• support for chaining conditionals. If a conditional skips a conditional, one more instruction is skipped at the cost of one cycle per skip, recursively.
• an interrupt system.
• hardware device support.
• the HCF instruction.
• the ADX, SBX, and STI instructions.

Differences from latest version

This comparison is current as of version 1.7. Version 1.4 has:

• support for the HCF instructions (not present in the 1.7 specification).
• no MDI or STD instructions.
• more expensive bit-shifting operations.
• unspecified rounding behavior for DIV and DVI.

Compatibility with latest version

After removing any HCF instructions, assembly source code can be reassembled for version 1.7. However, the rounding behavior of DVI should be checked; in version 1.7, it rounds towards zero, while in version 1.4 the rounding behavior is unspecified. In addition, the cycle costs of certain operations have been changed.

While similar in structure, the machine code for version 1.4 is incompatible with version 1.7. The opcodes for bitwise operations and the STI instruction have been reorganized.

Basic Instructions

Instruction	Behavior	EX register usage	See Also
SET B, A	Set Stores the value of A in B.	None
ADD B, A	Add Stores the value of B+A in B.	EX = 0x1 if B+A > 0xffff, 0 otherwise
SUB B, A	Subtract Stores the value of B-A in B.	EX = 0xffff if A > B, 0 otherwise
MUL B, A	Multiply Stores the value of B*A in B.	EX = the upper 16 bits of B*A
MLI B, A	Multiply Inverse Stores the value of B*A in B, where A and B are treated as signed.	EX = the upper 16 bits of B*A
DIV B, A	Divide Stores the value of B/A in B. Sets B to 0 if A is 0 (not an error).	EX = 0 if A is 0, or the lower 16 bits of B/A otherwise.
DVI B, A	Divide Inverse Stores the value of B/A in B, where A and B are treated as signed. Sets B to 0 if A is 0 (not an error). Rounds the result towards 0.	EX = 0 if A is 0, or the lower 16 bits of B/A otherwise.
MOD B, A	Modulo Stores the remainder of B/A in B. Sets B to 0 if A is 0 (not an error).	None
SHR B, A	Shift Right Shifts B to the right by A bits.	EX = the lower A bits of B that were shifted out	boolean algebra
ASR B, A	Arithmetic Shift Right Shifts B to the right by A bits. B is treated as signed.	EX = the lower A bits of B that were shifted out	boolean algebra
SHL B, A	Shift Left Shifts B to the left by A bits.	EX = the upper A bits of B that were shifted out	boolean algebra
STI B, A	Set-Increment Stores A in B, then increases I and J by 1.	None
AND B, A	AND Stores bitwise AND of B and A in B.	None	boolean algebra
BOR B, A	Bitwise OR Stores bitwise OR of B and A in B.	None	boolean algebra
XOR B, A	Exclusive-OR Stores bitwise EXCLUSIVE OR of B and A in B.	None	boolean algebra
IFE B, A	If Equal Perform the next instruction if B is equal to A.	None	control flow
IFN B, A	If Not Equal Perform the next instruction if B is not equal to A.	None	control flow
IFG B, A	If Greater Perform the next instruction if B is strictly greater than A.	None	control flow
IFA B, A	If After Perform the next instruction if B is strictly greater than A. A and B are treated as signed.	None	control flow
IFL B, A	If Less Perform the next instruction if B is strictly less than A.	None	control flow
IFU B, A	If Under Perform the next instruction if B is strictly less than A. A and B are treated as signed.	None	control flow
IFB B, A	If Bits[/If Blank] Perform the next instruction if B&A is not zero. In other words, if B and A have any of the same bits set, perform the next instruction.	None	control flow
IFC B, A	If Clear Perform the next instruction if B&A is zero. In other words, if B and A have any of the same bits set, omit the next instruction.	None	control flow
ADX B, A	Add EX Stores the value of A+B+EX in B.	On overflow, set EX to 0x0001. Otherwise, set EX to 0.
SBX B, A	Subtract [with] EX Stores the value of A-B+EX in B.	On underflow, set EX to 0xffff. Otherwise, set EX to 0.

Special Instructions

Instruction	Behavior	See Also
JSR A	Jump Subroutine Stores the address of the next instruction on the stack and begins the subroutine located at A.	control flow
INT A	Interrupt Triggers an interrupt from software with message A.
HCF A	Halt and Catch on Fire Randomly sets bits in RAM, and makes the DCPU almost inoperable.
IAG A	Interrupt Address Get Sets A to IA.
IAS A	Interrupt Address Set Sets IA to A.
RFI A	Return From Interrupt Disables interrupt queueing, pops A from the stack, then pops PC from the stack.
IAQ A	Interrupt Address Queue If A is nonzero, interrupts will be added to the queue instead of triggered. If A is zero, interrupts will be triggered as normal again.
HWN A	Hardware Number Sets A to the number of hardware devices.
HWQ A	Hardware Query Sets A, B, C, X, Y registers to information about hardware A. A+(B<<16) is a 32 bit word identifying the hardware id. C is the hardware version. X+(Y<<16) is a 32 bit word identifying the manufacturer.
HWI A	Hardware Interrupt Sends an interrupt to hardware A.

Addressing Modes

Name	Example	Description	See Also
Immediate	SET A, 42	Uses a literal number as the source of an operation. Using it as the destination fails silently.
Register	SET A, B	Uses a register as the source or destination.	registers
Memory	SET [0x100], [0x100+I]	Uses a memory location as the source or destination. The location can be either a literal number, a general purpose register, or the sum of the two.
PEEK	SET A, PEEK	Uses the location in memory pointed to by the stack pointer as the source or destination. The stack pointer itself is left unmodified.	stack
PICK	SET A, PICK 1	Uses the location in memory pointed to by the stack pointer, plus the argument to PICK, as the source or destination. The stack pointer itself is left unmodified.	stack
PUSH	SET PUSH, 10	First, decrements the stack pointer by 1. Then, uses the new memory location pointed to by SP. ("Pushing" a new value onto the stack.)	stack
POP	SET A, POP	First, uses the location pointed to by SP. Then, increments the stack pointer by 1. ("Popping" a value off the stack.)	stack

See also

• DCPU-16 specification
• Instruction set

References

• DCPU-16 1.1 specification (Copyright 2012 Mojang)
• DCPU-16 1.4 specification (Copyright 2012 Mojang)
• DCPU-16 1.7 specification (Copyright 2012 Mojang)