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'''INT''' is one of the Special [[opcodes]] in the [[DCPU-16]] specification. It triggers
'''INT''' is one of the Special [[opcodes]] in the [[DCPU-16]] specification. It triggers [[interrupt]] .
== Usage ==
== Usage ==
Revision as of 20:03, 25 May 2012
IA register has been set to a non-zero value,
INT will trigger an interrupt from software. First, interrupt queueing will be turned on. Then, first the
PC and then the
A registers are pushed to the stack. Finally, the
PC is set to
A is set to
IA register is zero, the interrupt will be ignored, although the instruction still takes four clock cycles.
Returning from an interrupt
RFI instruction should be used to return from an interrupt.
Although it is technically possible to return from an interrupt manually with other opcodes, this is not stable and is therefore discouraged.
The instability stems from the fact that to return from an interrupt back to the main program, several things must happen:
Aregister should be retrieved from the stack.
- Interrupt queueing should be turned off.
PCmust be popped from the stack.
Once interrupt queueing is turned off, another interrupt could come and delay return to the main program. Although
PC is still retained in the stack from the first interrupt, a long series of interrupts can prevent returning to the main program indefinitely.
Although the above problem is not completely stopped by
RFI, the main program at least is able to execute one instruction between interrupts. Eventually (if such a situation was prepared for), this will give the operator an opportunity to disable interrupts again without requiring a forced shutdown.
SET ia, myISR SET a, 1 INT a ADD a, 2 :end SET pc, end :myISR SET b, 1 ADD b, a RFI a ; continues execution at ADD a, 2
In binary machine code, this Special opcode's five-bit representation is:
0b0 1000 (
The instruction has a takes four cycles to execute, plus any additional cycles necessary to evaluate the arguments.
- DCPU-16 specification v1.7 (Copyright 2012 Mojang)